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January 26 2009
Automotive Grade AUIRS2016S(TR)
Features
* * * * * * * * Leadfree, RoHS compliant Automotive qualified* One high side output and internal low side Vs recharge. CMOS Schmitt trigger inverted input with pull up resistor CMOS Schmitt trigger inverted reset with pull down resistor 5V compatible logic level inputs Immune to -Vs spike and tolerant to dVs/dt
High Side Driver with Internal Vs Recharge Product Summary
Topology VOFFSET VOUT Io+ & I o- (typical) tON & tOFF (typical) Deadtime DTON / DTOFF (typical) Low side input, high side driver with Vs recharge 150 V 4.4 V - 20 V 0.25 A 150 ns 70ns / 6 us
Typical Applications
Common-rail magnetic valve application
Package Options
8 - Lead SOIC AUIRS2016S
Typical Connection Diagram
* Qualification standards can be found on IR's web site ww.irf.com
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AUIRS2016S(TR)
Table of Contents
Description Qualification Information Absolute Maximum Ratings Recommended Operating Conditions Electrical Characteristics Functional Block Diagram Input/Output Pin Equivalent Circuit Diagram Lead Definitions Lead Assignments Application Information and Additional Details Package Details Tape and Reel Details Part Marking Information Ordering Information
Page
3 4 5 6 7 11 12 13 13 14 20 21 22 23
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AUIRS2016S(TR)
Description
The AUIRS2016 is a high voltage power MOSFET and IGBT high side driver with internal VS-to-GND recharge NMOS. Proprietary HVIC and latch immune CMOS technologies enable ruggedized monolithic construction. The logic input is compatible with standard 5V CMOS or LSTTL logic. The output driver features a 250mA high pulse current buffer stage. The channel can be used to drive an N-channel power MOSFET or IGBT in the high side configuration, which operates up to 150 volts above GND ground.
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AUIRS2016S(TR)
Qualification Information
Automotive (per AEC-Q100) Comments: This family of ICs has passed an Automotive qualification. IR's Industrial and Consumer qualification level is granted by extension of the higher Automotive level. MSL3 260C SOIC8 (per IPC/JEDEC J-STD-020) Class M1 (per AEC-Q100-003) Class H2 (per AEC-Q100-002) Class C5 (per AEC-Q100-011) Class II, Level A (per AEC-Q100-004) Yes
Qualification Level
Moisture Sensitivity Level Machine Model ESD Human Body Model Charged Device Model IC Latch-Up Test RoHS Compliant
Qualification standards can be found at International Rectifier's web site http://www.irf.com/ Exceptions to AEC-Q100 requirements are noted in the qualification report. Higher MSL ratings may be available for the specific package types listed here. Please contact your International Rectifier sales representative for further information.
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AUIRS2016S(TR)
Absolute Maximum Ratings
Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to GND, all currents are defined positive into any lead. An operation above the absolute maximum limit is not implied and could damage the part.
Symbol
VBS VB VS VHO VCC VIN IIN VRES VESD VCDM dV/dt TJ TS
Definition
High Side Floating Supply Voltage High Side Driver Output Stage Voltage, Neg. transient: 0.5 ms, external MOSFET off High Side Floating Supply Offset Voltage Neg. transient 0.4 s Output Voltage Gate Connection Supply Voltage Input Voltage Input Injection Current. Full function, no latch-up; (guaranteed by design). Test at 5V and 7V on Eng. Samples. Reset Input Voltage Electrostatic Discharge Voltage(Human body model) Charge Device Model CDM, EOS/ESD Ass. Std 5.3. Number of discharges per pin: 6 Allowable Offset Voltage Slew Rate Junction Temperature Storage Temperature
Min.
-0.3 -5.0 -8.0 VS - 0.3 -0.3 -0.3 ---0.3 2k 2K -50 -55 -55
Max.
20 166 150 VB + 0.3 20 VCC + 0.3 +1 VCC + 0.3
Units
V V V V V V mA V V V V/nsec C
50 150 150
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AUIRS2016S(TR)
Recommended Operating Conditions
For proper operations the device should be used within the recommended conditions. Symbol Definition Min. Max. Units VB 1) High Side Driver Output Stage Voltage VS+4.4 VS+20 V VS High Side Floating Supply Offset Voltage -3 150 V VHO Output Voltage Gate VS VB V VCC Supply Voltage 4.4 6.5 V VIN Input Voltage 0 VCC V VRES Reset Input Voltage 0 VCC V -40 125 C Ta Ambient Temperature (VBS =14Vload: 50 Ohm 2.5nF into VS) 2) fs Switching frequency --200 kHz 3) tinlowmin Minimum low input width 1000 --ns 3) tinlhighin Minimum high input width 60 --ns 1) Reset-logic functional for VBS > 2V 2) Duty cycle = 0.5, VBS = 7 V 3) Guaranteed by design. Pulse width below the specified values may be ignored. Output will either follow the input or will ignore it. No false output state is guaranteed when minimum input width is smaller than tin.
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AUIRS2016S(TR)
Electrical Characteristics
Unless otherwise specified, VCC = 5V, VBS = 7V, VS = 0V, IN = 0V, RES = 5V, load R = 50, C = 2.5nF. Unless otherwise noted, these specifications apply for an operating junction temperature range of -40C Tj 125C. Symbol Definition Min Typ Max Units Test Conditions VCC Supply Characteristics VCCUV+ VCC Supply Undervoltage 4.3 VCC rising from 0V V Positive Going Threshold VCCUV- VCC Supply Undervoltage 2.8 Vcc dropping from 5V Negative Going Threshold VCCUVH VCC Supply Undervoltage 0.02 0.3 0.60 YS Lockout Hysteresis tdUVCC Undervoltage Lockout 0.5 20 VCC steps either from 6.5V to sec Response Time 2.7V or from 2.7V to 6.5V IQCC VCC Supply Current 400 uA VCC = 3.6V & 6.5V VBS Supply Characteristics VBSUV+ VBS Supply Undervoltage Positive Going Threshold VBSUV- VBS Supply Undervoltage Negative Going Threshold VBSUVH VBS Supply Undervoltage YS Lockout Hysteresis tdUVBS Undervoltage Lockout Response Time IQBS1 VBS Supply Current IQBS2 VBS VBS Supply Current VBS Drop Due to Output Turn-On 4.3 V 2.8 0.02 0.5 0.3 0.60 20 130 200 210 sec A A mV VBS steps either from 6.5V to 2.7V or from 2.7V to 6.5V static mode, VBS = 7V, IN = 0V or 5V static mode, VBS = 16V, IN = 0V or 5V VBS = 7V, CBS = 1F, tdIG-IN = 3sec, tTEST = 100sec VBS dropping from 5V VBS rising from 0V
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AUIRS2016S(TR)
Electrical Characteristics
Unless otherwise specified, VCC = 5V, VBS = 7V, VS = 0V, IN = 0V, RES = 5V, load R = 50, C = 2.5nF. Unless otherwise noted, these specifications apply for an operating junction temperature range of 40C Tj 125C.
Symbol Definition Gate Driver Characteristics IPKSo1 Peak Output Source Current IPKSo2 IPKSo3 IPKSo4 IHO,off tr1 tr2 tr3 tr4 IPKSi1 IPKSi2 IPKSi3 IPKSi4 tf1 tf2 tf3 Peak Output Source Current Peak Output Source Current Peak Output Source Current HO off-state leakage current (guaranteed by design) Output Rise Time Output Rise Time Output Rise Time Output Rise Time Peak Output Sink Current Peak Output Sink Current Peak Output Sink Current Peak Output Sink Current Output Fall Time Output Fall Time Output Fall Time 120 70 250 150 Min 120 70 250 150 Typ 250 150 500 300 1 0.2 0.3 0.1 0.15 250 150 500 300 0.2 0.3 0.1 0.15 0.4 0.5 0.2 0.3 0.4 0.5 0.2 0.3 Max Units mA mA mA mA uA sec sec sec sec mA mA mA mA sec sec sec sec VBS = 16V, Tj = 25C VBS = 16V IN = 5V, Tj = 25C IN = 5V,
(Note 2) (Note 2)
Test Conditions Tj = 25C,
(Note 2) (Note 2)
VBS = 16V, Tj = 25C VBS = 16V
Tj = 25C
VBS = 16V, IN = 5V, Tj = 25C, VBS = 16V, IN = 5V IN = 5V, Tj = 25C IN = 5V VBS = 16V, IN = 5V, Tj = 25C VBS = 16V, IN = 5V
tf4 Output Fall Time PW<10us
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AUIRS2016S(TR)
Electrical Characteristics
Unless otherwise specified, VCC = 5V, VBS = 7V, VS = 0V, IN = 0V, RES = 5V, load R = 50, C = 2.5nF. Unless otherwise noted, these specifications apply for an operating junction temperature range of -40C Tj 125C. Symbol Definition Min Typ Max Units Test Conditions tplh Input-to-Output Turn-On 0.15 0.35 sec Propagation Delay (50% input level to 10% output level) tphl Input-to-Output Turn-Off 0.15 0.35 sec Propagation Delay (50% input level to 90% output level) 0.15 0.35 tphl_res RES-to-Output Turn-Off sec Propagation Delay (50% input level to 90% [tphl] output levels) tplh_res RES-to-Output Turn-On 0.15 0.35 sec Propagation Delay (50% input level to 10% [tplh] output levels)
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AUIRS2016S(TR)
Electrical Characteristics
Unless otherwise specified, VCC = 5V, VBS = 7V, VS = 0V, IN = 0V, RES = 5V, load R = 50, C = 2.5nF. Unless otherwise noted, these specifications apply for an operating junction temperature range of -40C Tj 125C. Symbol Definition Min Typ Max Units Test Conditions Input Characteristics VINH High Logic Level Input 0.6* V VCC=5V Threshold Vcc VINL Low Logic Level Input 0.28* V VCC=5V Threshold Vcc RIN High Logic Level Input 60 100 220 k Resistance IIN High Logic Level Input 5 VIN=VCC A Current VH_RES High Logic Level RES Input 3 V VCC=5V Threshold VL_RES Low Logic Level RES Input 1.4 V VCC=5V Threshold RRES High Logic Level RES Input 60 100 220 k Resistance IRES Low Logic Level Input 5 VRES=0 A Current Recharge Characteristics ton_rech Recharge Transistor Turn3 6 9 VS = 5V sec On Propagation Delay toff_rech Recharge Transistor Turn0.08 0.2 sec Off Propagation Delay VRECH Recharge Output Transistor 1.2 V IS = 1mA, IN = 5V. On-State Voltage Drop Deadtime Characteristics DTHOFF High Side Turn-Off to 3 6 9 VCC = 5V, VBS = 7V sec Recharge gate Turn-On DTHON Recharge gate Turn-Off to 0.01 0.07 0.4 VCC = 5V, VBS = 7V sec High Side Turn-On
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AUIRS2016S(TR)
Functional Block Diagram
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Input/Output Pin Equivalent Circuit Diagrams
VB ESD Diode HO ESD Diode RESD
VS
GND
VCC
VB
VB
20V GND VS
20V 166V
GND
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AUIRS2016S(TR)
Lead Definitions
Pin Number 1 2 3 4 5 6 7 8 Symbol VCC INGND RESETVS NC HO VB Driver Supply, typically 5.0V Driver Control Signal Input (negative logic) Ground Driver Enable Signal Input (negative logic) MOSFET Source Connection No Connection (no Bondwire) MOSFET Gate Connection Driver Output Stage Supply Pin description
Lead Assignments
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AUIRS2016S(TR)
Application Information and Additional Details
A Truth table for Vcc, VBS, RESET, IN, HO and RechFET is shown as follows. This truth table is for ACTIVE LOW IN.
supply voltages and thresholds Vcc < VCCUVX X > VCCUV+ > VCCUV+ VBS X X X > VBSUV+ < VBSUVRESETX LOW X HIGH HIGH
Signals INX X HIGH LOW LOW
Output Ho OFF OFF OFF ON OFF
Recharge Path
ON ON ON OFF OFF
X means independent from signal
RESET = HIGH indicates that high side NMOS is allowed to be turned on. RESET = LOW indicates that high side NMOS is OFF. IN = LOW indicates that high side NMOS is on. IN = HIGH indicates that high side NMOS is off. RechFET = ON indicates that the recharge MOSFET is on. RechFET = OFF indicates that the recharge MOSFET is off.
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AUIRS2016S(TR)
Timing Diagrams Input / Output
Figure 3: Input/Output Timing Diagram
Reset
Figure 4: Reset Timing Diagram
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Performance Graphs RESET Functionality Graph:
RESET Functionality Graph
25 23 21 19 17 15 13 11 9 7 5 3.2 3.4 3.6 3.8 4.0 4.2 4.4 4.6 4.8 5.0 5.2 VCC (V) 25C -40C 125C
Figure 6. RESET Functionality: This graph explains the functionality limitation as a function of VCC, VBS and temperature. For each particular temperature and VCC, the output is non-functional for any value of VBS above the drawn curve. But for any value of VBS below the curve the functionality is fine.
RESET Functional Diagram: The diagram is guaranteed for the following condition: VCC=4.28V to 20V; VBS= 2V to 20V @ Tj= -40C to +125C (TBD)
IN-
RESET -
HO-VS: -40C
HO-VS: 25C
HO-VS: 125C
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VBS (V)
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AUIRS2016S(TR)
Input and Reset Thresholds:
Vinth+ vs VCC supply
4 Vinth+ (V) 3.5 3 2.5 2 4 4.5 5 5.5 VCC (V) 25C -40C 125C 6 6.5 7
Figure 7-1: Positive Input and Reset Threshold Voltage Distribution Curves
Vinth(-) vs VCC supply
3 2.8 Vinth(-) (Volt) 2.6 2.4 2.2 2 1.8 1.6 4 4.5 5 5.5 VCC (Volt) 25C -40C 125C 6 6.5 7
Figure 7-2: Negative Input and Reset Threshold Voltage Distribution Curves
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AUIRS2016S(TR)
VBUV Undervoltage Shutdown Threshold VB: TBD
IRS2016: UVBS+ vs Temp
4.0 3.8
UVBS Threshold
3.6 3.4 3.2 3.0 2.8 -50 -25 0 25 50
Tem p
75
100
125
150
Figure 8-1: Positive going VBUV value vs. Temperature: TBD
IRS2016: UVBS- vs Temp
4.0 UVBS Threshold 3.8 3.6 3.4 3.2 3.0 2.8 -50 -25 0 25 50 Temp 75 100 125 150
Figure 8-2: Negative going VBUV Value vs. Temperature
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AUIRS2016S(TR)
Input and Reset Impedance
Input and Reset Impedance
250 RIN (Kohm) 200 150 100 50 0 -50 -30
Example -10 10
30 T(C)
50
70
90
110
130
RIN MAX
RIN
RIN MIN
Figure 9: Input and Reset Impedance Distribution Curves
Recharge FET I-V Curve at -40C, 25C and 125C
V_Recharge FET IV-Curve
2.2 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 V_RECH (V) 25C -40C 125C
I_current (mA)
Figure 10: Recharge FET IV-Curve
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AUIRS2016S(TR)
Package Details: SOIC8
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AUIRS2016S(TR)
Tape and Reel Details: SOIC8
LOADED TAPE FEED DIRECTION
B
A
H
D F C
NOTE : CONTROLLING DIMENSION IN MM
E G
CARRIER TAPE DIMENSION FOR 8SOICN Metric Imperial Code Min Max Min Max A 7.90 8.10 0.311 0.318 B 3.90 4.10 0.153 0.161 C 11.70 12.30 0.46 0.484 D 5.45 5.55 0.214 0.218 E 6.30 6.50 0.248 0.255 F 5.10 5.30 0.200 0.208 G 1.50 n/a 0.059 n/a H 1.50 1.60 0.059 0.062
F
D C E B A
G
H REEL DIMENSIONS FOR 8SOICN Metric Code Min Max A 329.60 330.25 B 20.95 21.45 C 12.80 13.20 D 1.95 2.45 E 98.00 102.00 F n/a 18.40 G 14.50 17.10 H 12.40 14.40
Imperial Min Max 12.976 13.001 0.824 0.844 0.503 0.519 0.767 0.096 3.858 4.015 n/a 0.724 0.570 0.673 0.488 0.566
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AUIRS2016S(TR)
Part Marking Information
Part number
ASxxxxx
AYWW ?
IR logo
Date code
Pin 1 Identifier
? P MARKING CODE Lead Free Released Non-Lead Free Released
? XXXX
Lot Code (Prod mode - 4 digit SPN code)
Assembly site code Per SCOP 200-002
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AUIRS2016S(TR)
Ordering Information
Standard Pack Base Part Number Package Type Form AUIRS2016S(TR) SOIC8 Tube/Bulk Tape and Reel Quantity 95 2500 AUIRS2016S AUIRS2016STR Complete Part Number
The information provided in this document is believed to be accurate and reliable. However, International Rectifier assumes no responsibility for the consequences of the use of this information. International Rectifier assumes no responsibility for any infringement of patents or of other rights of third parties which may result from the use of this information. No license is granted by implication or otherwise under any patent or patent rights of International Rectifier. The specifications mentioned in this document are subject to change without notice. This document supersedes and replaces all information previously supplied.
For technical support, please contact IR's Technical Assistance Center http://www.irf.com/technical-info/
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105
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